CVS: cvs.openbsd.org: src

[Dimitry Andric <dim_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org>]

CVSROOT:	/cvs
Module name:	src
Changes by:	dim_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org	2006/12/21 18:34:46

Modified files:
	sys/arch/i386/i386: est.c 

Log message:
A more complete fix for perf status MSR's (on e.g. Core 2 Duo X6800),
that specify equal highest and lowest clock ratios.  EST is now
silently disabled on these, as was already done for lowest clock
ratios that are zero (on e.g. a bunch of Pentium 4's).

Other weird MSR's are still reported, because we first want to know
about them, before we decide how to handle them.