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CVS: cvs.openbsd.org: src
- To: source-changes_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org
- Subject: CVS: cvs.openbsd.org: src
- From: Dimitry Andric <dim_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org>
- Date: Thu, 21 Dec 2006 18:34:46 -0700 (MST)
Module name: src
Changes by: dim_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org 2006/12/21 18:34:46
A more complete fix for perf status MSR's (on e.g. Core 2 Duo X6800),
that specify equal highest and lowest clock ratios. EST is now
silently disabled on these, as was already done for lowest clock
ratios that are zero (on e.g. a bunch of Pentium 4's).
Other weird MSR's are still reported, because we first want to know
about them, before we decide how to handle them.
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