CVS: cvs.openbsd.org: src

[Miod Vallat <miod_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org>]

CVSROOT:	/cvs
Module name:	src
Changes by:	miod_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org	2006/04/17 10:08:01

Modified files:
	sys/arch/luna88k/luna88k: eh.S 
	sys/arch/m88k/include: cpu.h 
	sys/arch/m88k/m88k: genassym.cf m8820x_machdep.c 
	sys/arch/mvme88k/mvme88k: eh.S 

Log message:
Save pointers to up to four CMMU PFSR registers into the cpu_info structure.
This allows the exception handling code to skip the PFSR address computations.

The net result is that the PFSR_SAVE code becomes much simpler and smaller,
and that all processors will now spend time in PFSR_SAVE - previously, cpu0
was favored and other processors took a bit more time.

Note that 8:1 configurations do not use these fields - but then this is a
fixed monoprocessor configuration, for which the existing code was already
doing The Right Thing.

Tested on luna88k (2:1) by aoyama@, and on mvme88k (2:1 and 4:1) by me.