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CVS: cvs.openbsd.org: src
- To: source-changes_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org
- Subject: CVS: cvs.openbsd.org: src
- From: Michael Shalayeff <mickey_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org>
- Date: Mon, 7 Oct 2002 08:38:40 -0600 (MDT)
Module name: src
Changes by: mickey_(_at_)_cvs_(_dot_)_openbsd_(_dot_)_org 2002/10/07 08:38:40
sys/arch/hppa/hppa: fpemu.S locore.S machdep.c trap.c
on implementations w/ fpu included unimplemented instructions
are signaled through the exception trap w/ invalid opcode marked
instruction in the exception registers, not through the emulation
trap (as long as the fpu is enabled, of course).
parse emulation from the exception trap as well as the emulation
trap and fix the dispatcher into usable condition.
parse invalid op exception on trap and signal the user appropriately.
reset the exception on exec and for child on fork.
the later is appropriate since exceptions are delayed until next
fpu instruction, which was in the parent indeed, let him get it.
save parent's fpu context on fork before cipying it, if the
parent owned the fpu.