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Re: celeron shown nas p3
- To: misc_(_at_)_openbsd_(_dot_)_org
- Subject: Re: celeron shown nas p3
- From: Marcus Watts <mdw_(_at_)_umich_(_dot_)_edu>
- Date: Tue, 13 May 2003 06:34:49 -0400
> Subject: Re: celeron shown nas p3
> From: Dan Anderson <dan_(_at_)_mathjunkies_(_dot_)_com>
> To: "Denis A. Doroshenko" <d_(_dot_)_doroshenko_(_at_)_omnitel_(_dot_)_net>
> Cc: misc_(_at_)_openbsd_(_dot_)_org
> In-Reply-To: <20030513104833_(_dot_)_K550_(_at_)_hermit_(_dot_)_omnitel_(_dot_)_lan>
> References: <20030513104833_(_dot_)_K550_(_at_)_hermit_(_dot_)_omnitel_(_dot_)_lan>
> Content-Type: text/plain
> Message-Id: <1052819127_(_dot_)_3589_(_dot_)_33_(_dot_)_camel_(_at_)_ny-chicagost2d-72_(_dot_)_buf_(_dot_)_adelphia_(_dot_)_net>
> > cpu0: Intel Pentium III (Coppermine) ("GenuineIntel" 686-class, 128KB L2 cache) 802 MHz
> please correct me if I'm wrong, but one of the main differences between
> a Celeron and a PIII is the L2 Cache -- 128kb for a celeron versus 512kb
> for a Pentium. A PIII would also be a 686. So, basically, OpenBSD
> guessed right.
"Celeron" is a marketing term. It applies to a number of different
CPU chips, which are essentially "cheaper" versions of the Pentium.
The later Celeron chips were based on the coppermine cpu core, so
are almost exactly pentium III chips with less cache. The very
first celeron chips were based on the pentium III and had no cache
at all, consequently lousy performance. Some later Celerons compare
much more favorably against the corresponding III.
There is also the Xeon, which is another marketing term for chips
optimized for for the high-end server end. Those are variously
based on the pentium III and 4.
OpenBSD is obviously not capable of reading the writing
on the lid of the chip, let alon the writing on the box the
chip was sold in. All OpenBSD can report is what's in the
chip. The chip doesn't actually report strings at all,
just numeric IDs which get mapped into strings using logic
in /usr/src/sys/arch/i386/i386/machdep.c .